University Defence Research Collaboration in Signal Processing

Efficient Implementation of Iterative Polynomial Matrix EVD Algorithms Exploiting Structural Redundancies and Parallelisation

Publication:

IEEE Transactions on Circuits and Systems I: Regular Papers. ISSN 1549-8328

Publication Author(s):

Coutts, Fraser K. and Proudler, Ian K. and Weiss, Stephan

Publication Date:

Aug 2019

https://strathprints.strath.ac.uk/69429/

Publication URL:

https://ieeexplore.ieee.org/document/8848795

The University Defence Research Collaboration (UDRC) in Signal Processing is delivered in partnership between Dstl (the Defence Science and Technology Laboratory), The University of Edinburgh, Heriot-Watt University, The Queen's University of Belfast and University of Strathclyde.