University Defence Research Collaboration in Signal Processing

RIPL: A Parallel Image Processing Language for FPGAs

Publication:

ACM Transactions on Reconfigurable Technology and Systems, 11(1)

Publication Author(s):

R Stewart, K. Duncan, G Michaelson P Garcia, D Bhowmik and A Wallace

Publication Date:

Mar 2018

Publication URL:

Work Package:

E_WP6

File Attachments:

The University Defence Research Collaboration (UDRC) in Signal Processing is delivered in partnership between Dstl (the Defence Science and Technology Laboratory), The University of Edinburgh, Heriot-Watt University, The Queen's University of Belfast and University of Strathclyde.