University Defence Research Collaboration in Signal Processing

Themed Meeting Algorithm Implementation and Low SWAP Challenges Presentations

Session 1

A Compiler for sound floating-point computations, Joao Rivera, ETH Zurich. See Video

Why does scientific high performance computing need FPGAs?, Nick Brown, EPCC. See Video

Reconfigurable approximate accelerators for signal processing on resource constrained systems : from algorithms to real-time implementation, Yun Wu, Heriot-Watt University. See Video

Session 2

The challenges of AI and multi-camera imaging - an MBDA perspective, Nikki Easton/Gary Matson/Dean Goff, MBDA Systems

Session 3

Low-SWAP real-time EMG signal processing for human-computer interaction, John McAllister, Queen’s University Belfast. See Video

Better performance through resource-elastic dynamic stream processing on FPGAs, Dirk Koch, Heidelberg University Germany / University of Manchester. See Video

Session 4

Decoupling and parallelisation for broadband multichannel problems, Stephan Weiss, University of Strathclyde.

Processing and SWAP challenges for digital radar, David Greig/Hannah Durnall, Leonardo

The University Defence Research Collaboration (UDRC) in Signal Processing is delivered in partnership between Dstl (the Defence Science and Technology Laboratory), The University of Edinburgh, Heriot-Watt University, The Queen's University of Belfast and University of Strathclyde.